所属分类：
并行计算
开发工具：VHDL
文件大小：8KB
下载次数：1
上传日期：2013-03-11 10:24:20
说明： 一个TOP模块实现并行计算，一个TOP模块实现并行计算
(A TOP module parallel computing, a TOP module parallel computing)
文件列表：
test
....\clock_24h.v,1105,2013-01-13
....\counter_1s.v,890,2012-12-21
....\display_32bits.v,2066,2013-01-13
....\graph_st.v,768,2013-01-13
....\m_gen_hour.v,1173,2013-01-13
....\m_gen_min.v,1088,2013-01-12
....\m_gen_sec.v,1044,2013-01-12
....\pbdebounce.v,813,2012-12-21
....\reg_rgb.v,11006,2013-01-13
....\timer_1ms.v,745,2012-12-21
....\top.v,1804,2013-01-13
....\ucf.ucf,849,2013-01-13
....\vga_sync.v,2231,2012-12-19
