所属分类：
其他
开发工具：Others
文件大小：20KB
下载次数：20
上传日期：2006-02-20 00:06:37
说明： 这个是带先行进位的加法器的vhdl代码,比较复杂,仅仅供大家参考.
(into first place with the addition of VHDL code more complicated, just for reference.)
文件列表：
89_full_adder
.............\89_Full_adder.flow.rpt
.............\89_Full_adder.map.rpt
.............\89_Full_adder.map.summary
.............\89_Full_adder.qpf
.............\89_Full_adder.qsf
.............\89_Full_adder.qws
.............\89_Full_adder.vhd
.............\89_full_adder_stim.vhd
.............\89_pack_2_0.vhd
.............\cmp_state.ini
.............\db
.............\..\89_Full_adder.cbx.xml
.............\..\89_Full_adder.cmp.rdb
.............\..\89_Full_adder.db_info
.............\..\89_Full_adder.eco.cdb
.............\..\89_Full_adder.map.hdb
.............\..\89_Full_adder.map.qmsg
.............\..\89_Full_adder.sld_design_entry.sci
.............\..\89_Full_adder_cmp.qrpt
.............\README.TXT
.............\talkback
.............\........\89_Full_adder.map.talkback.xml
