JTAGrep

说明：  OPEN-JTAG ARM JTAG 測試原理 1 前言 本篇報告主要介紹ARM JTAG測試的基本原理。基本的內容包括了TAP (TEST ACCESS PORT) 和BOUNDARY-SCAN ARCHITECTURE的介紹，在此基礎上，結合ARM7TDMI詳細介紹了的JTAG測試原理。 2 IEEE Standard 1149.1 - Test Access Port and Boundary-Scan Architecture 從IEEE的JTAG測試標準開始，JTAG是JOINT TEST ACTION GROUP的簡稱。IEEE 1149.1標準最初是由JTAG這個組織提出，最終由IEEE批准並且標準化，所以，IEEE 1149.1這個標準一般也俗稱JTAG測試標準。 接下來介紹TAP (TEST ACCESS PORT) 和BOUNDARY-SCAN ARCHITECTURE的基本架構。
(OPEN-JTAG ARM JTAG Test Principle 1 Introduction This report introduces the ARM JTAG test the basic principles. Basic elements include TAP (TEST ACCESS PORT) and BOUNDARY-SCAN ARCHITECTURE introduction On this basis, the combination of ARM7TDMI detailed introduction of the JTAG test principle. 2 IEEE Standard 1149.1- Test Access Port and Boundary-Scan Architecture from the IEEE standard JTAG test began, JTAG is the JOINT TEST ACTION GROUP abbreviation. IEEE 1149.1 standard was originally proposed by JTAG this organization, and ultimately approved by the IEEE and standardization, therefore, IEEE 1149.1 standard generally known as the JTAG test standard. Introduce the next TAP (TEST ACCESS PORT) and BOUNDARY-SCAN ARCHITECTURE basic structure.)