所属分类：
中间件编程
开发工具：VHDL
文件大小：230KB
下载次数：89
上传日期：2008-04-24 15:53:47
说明： 用以实现信号的任意分频，用于信号的精确分频
(For the realization of arbitrary sub-frequency signals for precise signal frequency)
文件列表：
ddddd
.....\db
.....\..\add_sub_eeh.tdf
.....\..\pll.asm.qmsg
.....\..\pll.cbx.xml
.....\..\pll.cmp.cdb
.....\..\pll.cmp.hdb
.....\..\pll.cmp.logdb
.....\..\pll.cmp.rdb
.....\..\pll.cmp.tdb
.....\..\pll.cmp0.ddb
.....\..\pll.dbp
.....\..\pll.db_info
.....\..\pll.eco.cdb
.....\..\pll.eds_overflow
.....\..\pll.fit.qmsg
.....\..\pll.hier_info
.....\..\pll.hif
.....\..\pll.map.cdb
.....\..\pll.map.hdb
.....\..\pll.map.logdb
.....\..\pll.map.qmsg
.....\..\pll.pre_map.cdb
.....\..\pll.pre_map.hdb
.....\..\pll.psp
.....\..\pll.pss
.....\..\pll.rtlv.hdb
.....\..\pll.rtlv_sg.cdb
.....\..\pll.rtlv_sg_swap.cdb
.....\..\pll.sgdiff.cdb
.....\..\pll.sgdiff.hdb
.....\..\pll.sim.cvwf
.....\..\pll.sim.hdb
.....\..\pll.sim.qmsg
.....\..\pll.sim.rdb
.....\..\pll.sld_design_entry.sci
.....\..\pll.sld_design_entry_dsc.sci
.....\..\pll.syn_hier_info
.....\..\pll.tan.qmsg
.....\..\pll.tis_db_list.ddb
.....\..\prev_cmp_pll.asm.qmsg
.....\..\prev_cmp_pll.fit.qmsg
.....\..\prev_cmp_pll.map.qmsg
.....\..\prev_cmp_pll.qmsg
.....\..\prev_cmp_pll.sim.qmsg
.....\..\prev_cmp_pll.tan.qmsg
.....\..\wed.wsf
.....\pll.asm.rpt
.....\pll.done
.....\pll.fit.rpt
.....\pll.fit.summary
.....\pll.flow.rpt
.....\pll.map.rpt
.....\pll.map.summary
.....\pll.pin
.....\pll.pof
.....\pll.qpf
.....\pll.qsf
.....\pll.qws
.....\pll.sim.rpt
.....\pll.tan.rpt
.....\pll.tan.summary
.....\pll.vwf
.....\Vhdl1.vhd
.....\Vhdl1.vhd.bak
